The present invention relates to an image input device using color resolution filters.
One of the conventional image input devices includes a solid-state image pickup device comprised of charge coupled devices (CCDs) and a rotatable disk-shaped color resolution filter interposed between an object and the image pickup device, in which the light bearing the image of the object is passed through the color resolution filter thereby extracting a light having a particular wavelength. The resultant light is focused on the image pickup device.
FIG. 1 shows an image input device of the type described above. In FIG. 1, the image input device 50 includes a focusing lens 51 attached to the front surface of the device 50, through which a light bearing the image of an object 52 is entered. An image pickup device (hereinafter referred to as "CCD") 53 is disposed in a position on which the light passed through the focusing lens 51 is focused. A disk-shaped rotatable filter unit 54 is interposed between the lens 51 and the CCD 53. As shown in FIG. 4A, the disk-shaped filter unit 54 includes red filter element 55R, green filter element 55G, blue filter element 55B and a transparent filter element 56. These filter elements are circular in shape, of the same size, and are angularly displaced at right angles from one another as shown. The filter unit 54 is rotatable about a center shaft 54C extending perpendicular to, the filter surface for selectively disposing the filter elements on a light path between the lens 51 and the CCD 53. A stepper motor 57 is coupled to the shaft 54C for intermittently rotating the filter unit 54.
An analog-to-digital (A/D) converter 58 is connected to the output of the CCD 53 for subjecting the output signal from the CCD 53 to analog-to-digital conversion, and the output of the A/D converter 58 is in turn connected to a memory 59. The image input device 50 further includes a control unit 60 for controlling the operation of the stepper motor 57, the CCD 53 and the memory 59.
In the image input device arranged as above, brightness control and focal length adjustment are initially performed under the condition where the transparent filter element 56 is disposed on the light path. The stepper motor 57 is then rotated to retract the transparent filter element 56 and position the red filter element 55R on the light path, so that only the red light component is focused on the CCD 53. The CCD 53 receives the light for a predetermined period of time under the aegis of the control unit 63 and outputs data representative of a brightness-integrated value. The data is applied to the A/D converter 58 for analog-to-digital conversion, and the resultant digital data is stored in the memory 59.
The filter unit 50 is then rotated 90 degrees to place the green filter element 55G on the light path, and the green light component is extracted and stored in the memory 59. In the same fashion, the blue filter element 55B is subsequently placed on the light path attendant to the rotation of the stepper motor and the blue light component is extracted and stored in the memory 59.
FIG. 2 shows another example of a conventional image input device. In this device, a focusing lens 51 and a CCD 53 are disposed exactly in the same manner as those shown in FIG. 1. However, the arrangement of a filter unit 156 is slightly different from that shown in FIG. 4A in that as shown in FIG. 4B, the filter unit 156 is angularly equidivided into three segments to provide red color filter element 156R, green color element 156G and blue color element 156B. A DC motor 157 is coupled to the shaft 156a of the filter unit 156 and the disk-shaped filter is rotated by the DC motor 157.
To the rotation shaft of the DC motor 157, an encoder 159 is connected. The encoder 159 has a number if slits arranged to be movably disposed within a gap between an interrupter 160. The interrupter 160 produces pulse trains in accordance with the rotations of the encoder 159. The combination of the encoder 159 and the interrupter 160 has been adjusted to produce n-number pulses (n being multiples of 3 (three)) per one rotation of the rotation shaft of the DC motor 157. Hereinafter, the pulse trains produced from the interrupter 160 will be referred to as a position signal.
An image receiver 154 is connected to the output of the CCD 53 and a sync separator 164 is in turn connected to the output of the image receiver 154. The sync separator 164 separates sync signals from a video signal outputted from the image receiver 154 and the outputs the sync signals. A multiplier 163 is connected to the output of the sync separator 164. The multiplier 163 changes the synchronization of the sync signal to nine n-th (9/n). The multiplier 163 is comprised of a phase-locked loop (PLL) circuit as shown in FIG. 3.
Referring to FIG. 3, the PLL circuit include a phase comparator 163a, a low-pass filter 163b, a voltage controlled oscillator (VCO) 163c, and a frequency divider 163d. The phase comparator 163a has two input terminals, to one of which the sync signal is applied. The pulse trains produced from the VCO 163c are frequency divided into nine n-th (9/n) and the resultant pulses are applied to the other input of the phase comparator 163a. The phase comparator 163 outputs a signal having a phase difference between the two input signals. To the output of the phase comparator 163a, the LPF 163b is connected which has an integration characteristic. The output of the LPF 163b is applied to the VCO 163 as a control voltage. The PLL circuit shown in FIG. 3 controls the sync signal so that the phase difference between the sync signal and the pulse trains produced from the VCO 163c is zeroed, with the result that the pulse trains produced from the VCO 163c becomes equal to the sync signal multiplied by n ninth (n/9).
Referring back to FIG. 2, the thus multiplied sync signal is applied to one input of a phase comparator 162. The position signal is applied to the other input of the phase comparator 162. The phase comparator 162 produces a signal corresponding to a phase difference between these two input signals. A low-pass filter (LPF) 161 is connected to the output of the phase comparator 162. The LPF 161 is provided with an intergration characteristic. To the output of the LPF 161, a driver 158 is connected for driving the DC motor 157 according to pulse width modulation. The driver 158 drives the DC motor 157 in accordance with the output from the LPF 161.
In the above-described circuit shown in FIG. 2, a phase locked loop is provided in which the DC motor 157 serves as a voltage controlled oscillator. The DC motor 157 rotates the filter unit 156 one revolution during a period of time corresponding to 9 periods of the sync signals. That is, during a period of time in which one color filter traverses the optical path extending from the object 52 to the CCD 53, it takes a time corresponding to three periods of the sync signal. During the middle period of the three periods, data integrated in the CCD 53 is taken out to thereby provide corresponding color image.
Although two conventional image input devices have been described, these devices are involved with the following inconvenience or drawbacks. In both the image input devices shown in FIGS. 1 and 2, it is necessary that the filter unit be rotated to place the filter elements in seriatim on the optical path. Therefore, it takes considerable time to input the image. Further, in the device empolying the stepper motor for rotating the filter unit, unwanted vibrations are created. In the device shown in FIG. 2, a phase-locked loop is incorporated in another phase-locked loop, so that arrangement and adjustment of the circuit are complicated and the device becomes costly.
In order to shorten the period of time for picking the image up, the photosensitive elements 53a of the CCD 53 may be covered with red, green and blue filters 53R, 53G and 53B as shown in FIG. 5, thereby dispensing with the filter unit. However, the resolution becomes degraded to about one third.